1. Field of the Invention
This invention relates to a timepiece provided with a display device for warning a battery life and more particularly to an improved timepiece which can detect a voltage of a battery used as an electric supply source of the timepiece and display a battery life with the aid of a display device of the timepiece.
2. Description of the Prior Art
An electronic timepiece which makes use of a battery as an energy source loses its operating ability as soon as the battery comes to an end of its life. As a result, it is necessary to provide means for informing beforehand a time at which the battery comes to the end of its life.
In order to warn and display a battery life by detecting a given voltage drop condition of a battery, heretofore, it has been proposed to provide a timepiece comprising a display device for warning a battery life and a battery voltage detection circuit which makes use of a threshold level of a field effect transistor. As well known in the art, a battery voltage is so related to a battery capacity that when the battery capacity becomes small the battery voltage becomes also low. As a result, it is possible to detect the amount of lowered battery capacity by detecting the amount of decrease of the battery voltage. The amount of lowered battery voltage can be detected by the battery voltage detection circuit.
In FIG. 1 is shown a basic circuit representing a battery voltage detection circuit. In FIG. 1, reference numeral 1 designates an enhancement type P-MOS.multidot.FET, 2 to 5 each shows a complementary type inverter formed of a MOS.multidot.FET, 6 and 7 each illustrates a transmission gate and 8 designates a load resistor composed of a variable resistor. An inverter 9 is connected to the input of the voltage detection circuit and another inverter 10 to the output thereof. Both inverters 9, 10 serve to operate the voltage detection circuit in positive logic.
In the circuit shown in FIG. 1, the battery voltage detection circuit is composed of the P-MOS-FET 1, MOS.multidot.FET 2, 3 and variable resistor 8. A memory circuit is composed of the MOS.multidot.FETs 4, 5 and transmission gates 6, 7. The battery voltage detection circuit functions to effect sampling detection only when the gate voltage of the P.MOS.multidot.FET 1 becomes "H", that is, when a sampling detection instruction signal a becomes "H". During this time, the memory circuit functions to write therein an output delivered from the battery voltage detection circuit. When the sampling detection instruction signal a becomes "L", the battery voltage detection circuit does not effect the sampling detection and the memory circuit becomes its hold condition. The sampling detection is effected for the purpose of reducing an electric current to be consumed.
In the voltage detection circuit shown in FIG. 1, however, the FET transistor 1 and the detection level adjustable resistor 8 constitute a voltage divider circuit, so that an electric current to be consumed by the detecting operation is increased to a value which could not be disregarded. In order to obviate such disadvantage, it has heretofore been proposed to use a system of detecting intermittently a battery voltage with the aid of a sampling pulse having a period on the order of 1 second to 1 minute. If the period of such sampling pulse becomes too short, the consumed electric current is increased. On the contrary, if the period of such sampling pulse becomes too long, the consumed electric current is decreased, but when an erroneous operation occurs, such erroneous operation persists until the next sampling is effected. As a result, it is obliged to use the above mentioned short sampling period at the sacrifice of the loss of the consumed electric current.